Job Responsibilities

1.Develop human-computer interfaces (HCIs) for EDA software systems, and design and implement on-disk and in-memory database architectures.

2.Perform adaptation of software products for cloud services, conduct joint debugging and testing, and provide technical support.

3.Develop script interaction interfaces for non-graphical user interface (non-GUI) environments.

4.Integrate and maintain graphical user interfaces (GUIs) for user operations.

Job Requirements

1.Proficiency in C/C++ programming languages with relevant programming experience.

2.Experience in developing complex system software and writing human-computer interaction interfaces.

3.Strong capability in designing software API interfaces.

4.Familiarity with technologies such as multi-process, multi-threading, and network programming.

5.Familiarity with layout GUI development (GTK, QT) under Linux is preferred.

6.Good English proficiency, with the ability to read and write English materials smoothly.

7.Strong communication and collaboration skills, as well as self-learning ability.

Job Responsibilities

1.Based on the existing software engineering architecture, optimize or redesign designated algorithm function modules, and compile reasonable unit tests in accordance with specifications.

2.Based on the existing software engineering architecture, expand new algorithm modules according to product requirements, develop algorithms for numerical modeling, optimization, data analysis, etc., and properly connect with other algorithm modules in line with interface protocols.

3.Based on abstracted problems and models, design new algorithms to solve problems, with consideration for both algorithm efficiency and scalability.

Job Requirements

1.Possess C++ programming experience in a Linux environment.

2.Be familiar with data structures, dynamic programming, multi-threading, and distributed computing.

3.Be proficient in programming with scripting languages such as Tcl, Python, and Yaml.

4.Preference will be given to candidates with knowledge of commercial EDA digital chip physical design tools and ASIC design flows.

5.Preference will be given to candidates with knowledge of algorithms such as floorplanning, placement and routing, statistical timing analysis, physical synthesis, power analysis, and delay calculation.

6.Preference will be given to candidates with knowledge of optimization algorithms, matrix computation, and linear programming.

7.Have a solid foundation in mathematics and physics, as well as strong analytical skills and problem-solving abilities.

8.Be able to systematically approach and learn open-source large-scale software projects, and quickly understand specific algorithm modules in a targeted manner.

9.Have good English listening, speaking, reading, and writing skills, and be able to read English literature fluently.

Job Responsibilities:

1.Based on the provided Product Planning SOW (Statement of Work) document, compile clear functional requirement documents and functional acceptance procedures;

2.Cooperate with algorithm engineers and software engineers responsible for relevant functions to optimize functional requirement documents;

3.Accept the development results delivered by algorithm engineers and software engineers, compile acceptance reports, and propose optimization requirements;

4.Cooperate with customers to meet their needs using the company's digital ASIC backend design products, identify product functional defects, and compile requirement documents for product function optimization;

5.Continuously think about and explore new product functional requirements based on verification conclusions and industry experience.

Job Requirements:

1.Experience in digital backend design is preferred;

2.Experience in using mainstream chip digital design tools is preferred;

3.Experience in product design of large-scale software projects, and experience in participating in large-scale software research projects of research institutions is preferred;

4.Proficiency in using scripts such as Tcl, Python, and Yaml to establish automated processes;

5.Willingness to continuously conduct in-depth learning and research in backend design;

6.Strong sense of responsibility and good communication and coordination skills;

7.Good English listening, speaking, reading, and writing skills, and the ability to read English literature fluently.

Job Responsibilities

1.Be familiar with the digital backend design flow of 3DIC advanced packaging from RTL to GDSII, including place and route (PnR), static timing analysis (STA), physical verification, and power analysis.

2.Participate in formulating the R&D direction and technical solutions of PnR products based on tool usage experience and industry experience; conduct research and propose requirements for new product functions.

3.Cooperate with customers to use the company's PnR products to meet their design needs; develop various flexible script tools and product application templates. Compile requirement documents for product optimization based on customer and application feedback.

4.Participate in the function acceptance of 3DIC advanced packaging place and route tools; compile documents such as test and acceptance reports, propose optimization requirements, and provide feedback on and track bugs.

5.Participate in the delivery of EDA products and output technical documents such as product function introductions and product manuals.

Job Requirements

1.Master's degree or above is required; professional background in electronic information, microelectronics, semiconductors, electronic engineering, materials, or other related fields.

2.Be familiar with the principles and methods of analog circuit and digital circuit design; possess the ability to independently design, develop, and debug integrated circuits, such as proficiently mastering design tools like Cadence and Altium Designer.

3.Be familiar with the testing methods and processes of integrated circuits, as well as various software tools and EDA tools used in the design and production of integrated circuits.

4.Have a certain foundation in coding and be able to use basic programming languages such as TCL.

Job Responsibilities：

1.Capable of completing all stages of backend design from RTL to GDSII, including the following steps: Floorplanning, Power Plan, CTS (Clock Tree Synthesis), Timing Analysis, IR-Drop Analysis, Crosstalk Analysis, Formal Verification, STAR_RC, STA (Static Timing Analysis) and DMSA (Dynamic Multi-Scenario Analysis);

2.Familiar with UPF (Unified Power Format)/CPF (Common Power Format) files and able to independently complete the Low Power Design Flow;

3.Familiar with Hierarchical Design Flow, and candidates with top-level design experience are preferred;

4.Proficient in STA timing analysis and capable of using AOCV (Advanced On-Chip Variation) mode analysis;

5.Familiar with tools such as Innovus, ICC2 (Integrated Circuit Compiler II), Formality, PrimeTime, and Redhawk;

6.Proficient in English listening, speaking, reading, and writing; possess strong learning ability and good team collaboration spirit;

7.Have a solid foundation in professional knowledge of circuit analysis, analog circuits, and digital circuits.

Requirements for the Position：

A bachelor's degree or above in relevant majors such as Electronic Engineering, Microelectronics, Communication Engineering, Automation, etc.

Job Responsibilities：

1.Develop, optimize, and test ASIC physical synthesis (including physical synthesis, timing analysis, placement, routing, and optimization);

2.Develop and optimize SignOff analysis tools (covering STA, power analysis, SI (Signal Integrity) analysis, IR (IR-Drop) analysis, parasitic extraction, and DRC (Design Rule Check));

3.Design and develop algorithms for numerical modeling, optimization, data analysis, and other related areas.

Requirements for the Position：

1.A master's degree or above in majors such as Computer Software, Applied Mathematics, Physics, Electronic Engineering, and Electronic Microelectronics;

2.Possess programming experience in C/C++ under the Linux environment;

3.Be familiar with data structures, dynamic programming, multi-threading, and distributed computing;

4.Be familiar with programming in scripting languages such as Tcl/Tk and Python;

5.Candidates with knowledge of OpenROAD, commercial EDA digital chip physical design tools, and ASIC design flow are preferred;

6.Candidates with knowledge of algorithms such as floorplanning, placement and routing, statistical timing analysis, physical synthesis, power analysis, and delay calculation are preferred;

7.Candidates with knowledge of optimization algorithms, matrix computation, and linear programming are preferred;

8.Have a solid foundation in mathematics and physics, as well as strong analytical abilities;

9.Possess good English listening, speaking, reading, and writing skills, and be able to read English literature fluently.

Job Responsibilities：

1.Development of human-computer interface for EDA software systems, and development of on-disk and in-memory database architectures;

2.Adaptation, joint debugging & testing, and technical support of software products on cloud services;

3.Development of script interaction interfaces under non-graphical interfaces;

4.Integration and maintenance of graphical user operation interfaces.

Requirements for the Position：

1.Proficient in C/C++ programming languages with programming experience;

2.Experience in developing system software and writing human-computer interaction interfaces;

3.Possess strong capabilities in software API interface design;

4.Familiar with technologies such as multi-process, multi-threading, and network programming;

5.Those familiar with layout GUI development under Linux (GTK, QT) are preferred;

6.Good English proficiency, able to smoothly read and write English materials;

7.Strong communication and collaboration skills as well as self-learning ability.

Job Responsibilities：

1.Responsible for software quality testing of core products, including building and maintaining cloud-based software quality testing systems;

2.Responsible for writing test modules for the testing processes of algorithm modules and functional modules;

3.Continuously collect test samples after acceptance of new functions from product managers, and be able to expand and establish new test cases, conduct regression test and analyze results, etc.

Requirements for the Position：

1.Master's degree or PhD in Computer Science, Microelectronics, Electronics, or other electrical-related majors;

2.Proficiency in using shell, python, Tcl/Tk, or other scripting languages;

3.Ability to learn and understand DevOps open-source tools for cloud service architectures, and apply the latest DevOps tools to work;

4.Knowledge of digital chip design or ASIC backend design flow is preferred;

5.Ability to read and write English documents, and able to fluently read English technical blogs.

Job Responsibilities：

1.Participate in and complete the design of high-performance IPs of advanced processes and conventional Analog/Mixed Signal IPs;

2.Guide layout personnel in completing the physical design of IP blocks;

3.Assist testers in formulating test plans for various IPs and complete performance testing.

Requirements for the Position：

1.A bachelor's degree or above in Integrated Circuit, Microelectronics, or Computer-related majors;

2.More than 4 years of working experience in analog IP layout design; experience in digital standard cell library layout is preferred;

3.Proficiency in using mainstream IC layout design and verification tools such as Virtuoso, Calibre, etc.; ability to understand DRC/LVS rule files from different Foundries and extract parasitic parameters;

4.Familiar with CMOS logic/MS/RF processes and PDK contents;

5.Mastery of relevant skills and methods in integrated circuit layout design (such as PCELL establishment, implementation of high-precision matching, layout implementation of high-speed circuits, optimization of parasitics, latch-up prevention, crosstalk isolation, etc.);

6.Knowledge of programming languages such as SKILL/Perl/TCL is preferred.

Responsibilities for this role will include:

1.Take ownership for the standard cell library content definition and circuit implementation

2.Coordinate w/ layout team to define layout architecture and complete layout optimization

3.Take care of the library characterization flow to ensure library data accurate.

4.Bridge the gap between design and foundry process development by bringing critical design perspective to technology definition as well as aiding design teams in maximizing the benefits of new technology nodes.

5.Risk alignment and handling arising issues, have capability to take necessary steps to solve raising issues and keep delivery on time.

6.Anticipate the preparation for the plans and decision making.

Essential Skills & Experience:

1.Master degree or above in related fields such electrical engineering, computer science, physics and etc..

2.Good understanding semiconductor process/devices/physics, familiar with transistor lever circuit simulation and verification.

3.Skillful in the use of EDA tools(virtuoso, spectre, hspice, StarRC etc.).

4.Familiar with script language, such as Perl, Python

5.Self-motivated, Active risk management skill and mitigate impact.

Responsibilities for this role will include:

1.Take ownership for the standard cell library content definition and circuit implementation

2.Coordinate w/ layout team to define layout architecture and complete layout optimization

3.Take care of the library characterization flow to ensure library data accurate.

4.Bridge the gap between design and foundry process development by bringing critical design perspective to technology definition as well as aiding design teams in maximizing the benefits of new technology nodes.

5.Risk alignment and handling arising issues, have capability to take necessary steps to solve raising issues and keep delivery on time.

6.Anticipate the preparation for the plans and decision making.

Essential Skills & Experience:

1.Master degree or above in related fields such electrical engineering, computer science, physics and etc..

2.Good understanding semiconductor process/devices/physics, familiar with transistor lever circuit simulation and verification.

3.Skillful in the use of EDA tools(virtuoso, spectre, hspice, StarRC etc.).

4.Familiar with script language, such as Perl, Python

5.Self-motivated, Active risk management skill and mitigate impact.

Job Responsibilities

1.Be familiar with the digital backend design flow of 3DIC advanced packaging from RTL to GDSII, including place and route (PnR), static timing analysis (STA), physical verification, and power analysis.

2.Participate in formulating the R&D direction and technical solutions of PnR products based on tool usage experience and industry experience; conduct research and propose requirements for new product functions.

3.Cooperate with customers to use the company's PnR products to meet their design needs; develop various flexible script tools and product application templates. Compile requirement documents for product optimization based on customer and application feedback.

4.Participate in the function acceptance of 3DIC advanced packaging place and route tools; compile documents such as test and acceptance reports, propose optimization requirements, and provide feedback on and track bugs.

5.Participate in the delivery of EDA products and output technical documents such as product function introductions and product manuals.

Job Requirements

1.Master's degree or above is required; professional background in electronic information, microelectronics, semiconductors, electronic engineering, materials, or other related fields.

2.Be familiar with the principles and methods of analog circuit and digital circuit design; possess the ability to independently design, develop, and debug integrated circuits, such as proficiently mastering design tools like Cadence and Altium Designer.

3.Be familiar with the testing methods and processes of integrated circuits, as well as various software tools and EDA tools used in the design and production of integrated circuits.

4.Have a certain foundation in coding and be able to use basic programming languages such as TCL.